Title :
Hysteresis in neural-type circuits
Author :
El-Leithy, N. ; Newcomb, R.W.
Author_Institution :
Dept. of Electr. Eng., Maryland Univ., College Park, MD, USA
Abstract :
The mechanism of generation of hysteresis in a neural-type cell is presented. To make the theory tractable, it is assumed that the hysteresis determining MOS transistors operate in their square-law region when turned on. A set of equations is obtained that can be used for the design of MOS transistor neural-type cells which give pulse code modulation for the coding of information in neural-type systems
Keywords :
encoding; hysteresis; insulated gate field effect transistors; network analysis; neural nets; pulse-code modulation; MOS transistors; hysteresis; information coding; neural-type circuits; pulse code modulation; square-law region; Circuits; Educational institutions; Equations; Hysteresis; Indium tin oxide; Laboratories; MOSFETs; Modulation coding; Pulse modulation; Voltage;
Conference_Titel :
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location :
Espoo
DOI :
10.1109/ISCAS.1988.15091
