DocumentCode
2019901
Title
Reconfigurable pipelined data converter architecture
Author
Lee, Edward K F
Author_Institution
Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
Volume
1
fYear
1996
fDate
18-21 Aug 1996
Firstpage
162
Abstract
A reconfigurable pipelined data converter architecture suitable for implementing Field Programmable Mixed analog and digital Array (FPMA) is described. The proposed architecture can be reconfigured to a number of different analog-to-digital converters and/or digital-analog converters for a given number of conversion stages with different resolutions
Keywords
analogue-digital conversion; calibration; digital-analogue conversion; mixed analogue-digital integrated circuits; pipeline processing; ADC; DAC; analog-to-digital converters; conversion stages; digital-analog converters; field programmable mixed analog/digital array; pipelined data converter; reconfigurable data converter architecture; resolutions; self-calibration technique; Analog circuits; Analog-digital conversion; Computer architecture; Digital-analog conversion; Field programmable analog arrays; Field programmable gate arrays; Gratings; Prototypes; Silicon; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1996., IEEE 39th Midwest symposium on
Conference_Location
Ames, IA
Print_ISBN
0-7803-3636-4
Type
conf
DOI
10.1109/MWSCAS.1996.594074
Filename
594074
Link To Document