Title :
Merged arithmetic for computing wavelet transforms
Author :
Choe, Gwangwoo ; Swartzlander, Earl E., Jr.
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
Abstract :
A variation of merged arithmetic is applied to the implementation of the wavelet transform. This approach offers a simple design trade-off between the computational accuracy and the complexity. Our analysis shows that the trade-off is a function of the input data resolution, the number of filter taps, the arithmetic precision, and the level of the wavelet transform. The design parameter can be also fixed for a given number of taps and used to determine the minimum word size for the wavelet coefficients of the transform. The key element of this approach is to introduce a “truncation” within the merged arithmetic reduction process which provides equivalent throughput with substantially less complexity. An experiment has been conducted to verify the analysis, which suggests that 24-bit merged arithmetic is required for the EZW algorithm to handle up to a level 6-wavelet transform
Keywords :
FIR filters; digital arithmetic; digital filters; wavelet transforms; EZW algorithm; arithmetic precision; computational accuracy; equivalent throughput; filter taps; input data resolution; merged arithmetic; minimum word size; truncation; wavelet transforms; Algorithm design and analysis; Arithmetic; Concurrent computing; Digital signal processing; Electronic switching systems; Filters; Finite impulse response filter; Image coding; Signal processing algorithms; Throughput; Wavelet analysis; Wavelet coefficients; Wavelet transforms;
Conference_Titel :
VLSI, 1998. Proceedings of the 8th Great Lakes Symposium on
Conference_Location :
Lafayette, LA
Print_ISBN :
0-8186-8409-7
DOI :
10.1109/GLSV.1998.665225