DocumentCode :
2020479
Title :
A combined interval and floating point multiplier
Author :
Stine, James E. ; Schulte, Michael J.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Lehigh Univ., Bethlehem, PA, USA
fYear :
1998
fDate :
19-21 Feb 1998
Firstpage :
208
Lastpage :
215
Abstract :
Interval arithmetic provides an efficient method for monitoring and controlling errors in numerical calculations. However, existing software packages for interval arithmetic are often too slow for numerically intensive computations. This paper presents the design of a multiplier that performs either interval or floating point multiplication. This multiplier requires only slightly more area and delay than a conventional floating point multiplier, and is one to two orders of magnitude faster than software implementations of interval multiplication
Keywords :
delays; floating point arithmetic; multiplying circuits; area; combined interval/floating point multiplier; delay; numerical calculations; numerically intensive computations; Application software; Arithmetic; Computer architecture; Computer errors; Computerized monitoring; Delay; Delay estimation; Digital arithmetic; Error correction; Hardware; Laboratories; Monitoring; Software packages;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI, 1998. Proceedings of the 8th Great Lakes Symposium on
Conference_Location :
Lafayette, LA
ISSN :
1066-1395
Print_ISBN :
0-8186-8409-7
Type :
conf
DOI :
10.1109/GLSV.1998.665227
Filename :
665227
Link To Document :
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