Title :
The EPAC architecture: an expert cell approach to field programmable analog circuits
Author_Institution :
IMP Inc., San Jose, CA, USA
Abstract :
This paper describes the architectural configuration and various design trade-offs of the Electrically Programmable Analog Circuit (EPAC TM), an expert-cell approach to meeting the market need for an analog counterpart to the digital FPGA. It provides an overview of the technology, discusses architectural issues, and describes the internal operation of the first commercial EPAC devices. The paper concludes with various application examples
Keywords :
CMOS analogue integrated circuits; analogue processing circuits; application specific integrated circuits; EPAC architecture; architectural configuration; electrically programmable analog circuit; expert cell approach; field programmable analog circuits; Analog circuits; CMOS process; Debugging; EPROM; Electronics packaging; Field programmable gate arrays; Functional programming; Integrated circuit interconnections; Logic programming; Random access memory;
Conference_Titel :
Circuits and Systems, 1996., IEEE 39th Midwest symposium on
Conference_Location :
Ames, IA
Print_ISBN :
0-7803-3636-4
DOI :
10.1109/MWSCAS.1996.594077
