DocumentCode
2020814
Title
Fabrication of Microchannel embedded TSV interposer and its influence on TSV´s electrical parameters
Author
Xia, Yanming ; Ma, Shenglin ; Qin, Lifeng ; Jin, Yufeng ; Chen, Jing
Author_Institution
Department of Mechanical & Electrical Engineering, Xiamen University, Fujian, 361005, China
fYear
2015
fDate
11-14 Aug. 2015
Firstpage
699
Lastpage
704
Abstract
In this paper Microchannel embedded TSV interposer is presented, process development is proposed with direct Si-Si wafer bonding, effects of embedded cooling Microchannel on TSV´s parasitic electrical parameters are analyzed with finite element analysis tool. With the developed process, Microchannel sample and Cu TSV sample are successfully fabricated. Simulation results disclose that microchannel with cooling DI water will make influence mainly on TSV´s parasitic capacitance and conductance.
Keywords
Bonding; Cooling; Inductance; Microchannels; Silicon; Through-silicon vias; Microchannels; Staggering Si Posts; TSV interposer; TSV´s electrical parameters;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Packaging Technology (ICEPT), 2015 16th International Conference on
Conference_Location
Changsha, China
Type
conf
DOI
10.1109/ICEPT.2015.7236681
Filename
7236681
Link To Document