DocumentCode :
2021168
Title :
Obtaining logic minimization for asynchronous controllers synthesis to digital design course
Author :
Oliveira, Duarte L. ; Ferreira, Luiz S. ; Romano, Leonardo
Author_Institution :
Electron. Eng. Div., Aeronaut. Inst. of Technol., Brazil
fYear :
2010
fDate :
8-9 Dec. 2010
Firstpage :
202
Lastpage :
206
Abstract :
Synchronous digital systems have been presenting serious problems of implementation in DSM (deep sub-micron) VLSI technology. The asynchronous paradigm has become an interesting alternative. Unfortunately, the topic of asynchronous circuits has been ignored in most university courses. An important step in the synthesis of asynchronous controllers is the logic minimization. Several algorithms were proposed, some of them are not available to students and usually they are complex to apply manually. In this paper we propose a simple method to perform logic minimization starting from XBM controllers. The simplicity of the method and its optimization capacity permit the students to apply it manually in any moment of a digital basic course.
Keywords :
VLSI; asynchronous circuits; electronic engineering education; XBM controllers; asynchronous circuits; asynchronous controllers synthesis; asynchronous paradigm; deep sub-micron VLSI technology; digital design course; logic minimization; synchronous digital systems; Algorithm design and analysis; Asynchronous circuits; Context; Design automation; Logic circuits; Minimization; Synchronization; Finite state machine; Logic minimization; Logic synthesis; XBM specification; hazard logic;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Engineering Education (ICEED), 2010 2nd International Congress on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4244-7308-3
Type :
conf
DOI :
10.1109/ICEED.2010.5940791
Filename :
5940791
Link To Document :
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