Traffic light system design on FPGA

Author

Koay, Boon Kiat ; Isa, Maryam Mohd

Author_Institution

Fac. of Eng., Univ. Putra Malaysia, Serdang, Malaysia

fYear

2009

fDate

16-18 Nov. 2009

Firstpage

269

Lastpage

271

Abstract

Traffic light system gives sign of direction and warning to road user to avoid road collision and to optimize the flow rate of vehicle in the junction. This paper presents design of a low cost performance traffic light system. This type of traffic light is suitable for town and small city where sophisticated traffic light system is too costly. A traffic light system nearby the university was chosen as reference. The program is written in verilog on Quartus II software and implemented on DEII FPGA board.

Keywords

field programmable gate arrays; hardware description languages; logic design; road traffic; traffic engineering computing; DEII FPGA board; Quartus II software; Verilog program; field programmable gate array; traffic light system design; vehicle flow rate; Cities and towns; Communication system traffic control; Costs; Detectors; Field programmable gate arrays; Lighting control; Memory management; Radar detection; Road accidents; Road vehicles; FPGA; traffic light; verilog;

fLanguage

English

Publisher

ieee

Conference_Titel

Research and Development (SCOReD), 2009 IEEE Student Conference on

Conference_Location

UPM Serdang

Print_ISBN

978-1-4244-5186-9

Electronic_ISBN

978-1-4244-5187-6

Type

conf

DOI

10.1109/SCORED.2009.5443035

Filename

5443035

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2021999