Thermal design of power GaN FETs in microstrip and coplanar MMICs

The paper presents a discussion on the thermal design of integrated power GaN devices. After a short outline of some critical thermal modelling issues, design guidelines are proposed on the basis of thermal simulations; the results presented suggest that for room temperature applications SiC substrate thinning (thus implying a microstrip process) is not mandatory from a thermal standpoint. This would open the possibility for coplanar GaN MMICs, already exploited for low-noise amplifiers, also in power circuits.