DocumentCode
2023803
Title
Digital carrier recovery with adaptive dual loop DPLL for mobile communication applications
Author
Kim, Beomsup
Author_Institution
Philips Research, Palo Alto, CA, USA
Volume
3
fYear
1993
fDate
27-30 April 1993
Firstpage
29
Abstract
The dual-loop digital phase-locked loop (DPLL) adjusts its control parameters adaptively according to input noise and phase fluctuations based on the recursive least square criterion. This technique requires only moderate computational complexity and memory space, but it still tracks phase fluctuation effectively and reduces the input jitter within allowable jitter tolerance. Also, since it achieves fast initial acquisition of frequency and phase without a limitation of pull-in range, it makes fast carrier switching possible. The dual loop DPLL allows robust stability and bandwidth control and achieves zero static phase offset for step input frequency changes.<>
Keywords
adaptive filters; computational complexity; digital filters; least squares approximations; mobile communication systems; phase-locked loops; stability; step response; tracking; adaptive dual loop DPLL; bandwidth control; computational complexity; digital phase-locked loop; fast carrier switching; jitter tolerance; mobile communication; phase fluctuation tracking; recursive least square criterion; step input frequency changes;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, 1993. ICASSP-93., 1993 IEEE International Conference on
Conference_Location
Minneapolis, MN, USA
ISSN
1520-6149
Print_ISBN
0-7803-7402-9
Type
conf
DOI
10.1109/ICASSP.1993.319427
Filename
319427
Link To Document