Numerical analysis and parameter optimization of thermal stress effect for low-k layer flip-chip with copper pillar bump

The thermal-mechanical reliability of the flip-chip with copper pillar bump is analyzed through finite element numerical simulation and Kriging response surface models optimization method. The results show that: the successive order of factors affecting the chip warpage is: die thickness, bump pitch, die thickness, substrate thickness, Cu Pillar height, Cu Pillar height, PI thickness, PI opening size; the successive order of factors affecting the stress is: PI opening size, bump pitch, PI thickness, die thickness, Cu Pillar height, substrate thickness; the objectives and constraints are explicated through Kriging model. In Kriging model, the quadratic form is adopted as regression function, Gaussian function is chosen as correlative function, and sequential quadratic programming is used to solve the problem. After optimization, the first principal stress is decreased significantly on the Low-K layer; meanwhile, chip warpage is under control.