DocumentCode :
2024368
Title :
A digital phase-locked-loop for synchronization of single-phase sources with the utility grid
Author :
Almeida Braatz, Luciano ; Schubert Severo, Sergio Luiz ; Perleberg Lerm, Andre Arthur ; de Freitas Ciarelli, Wagner
Author_Institution :
Electr. Eng. Dept., IFSul-Fed. Inst. of Sci. & Technol., Pelotas, Brazil
fYear :
2013
fDate :
16-20 June 2013
Firstpage :
1
Lastpage :
6
Abstract :
This paper presents an innovative digital phase-locked-loop (PLL) implementation that uses a moving average filter with a very high rejection on the fundamental frequency and its harmonics. This PLL is very versatile and can be used for synchronizing single-phase sources, control of drives, among others. Due to its fully digital implementation it has a low cost, short settling time and high immunity to noise, disturbances and harmonic components. The method can be applied directly to microprocessor controllers connected in smart grids. Numerical results confirm the efficiency of the developed PLL.
Keywords :
digital phase locked loops; smart power grids; synchronisation; PLL; digital phase-locked-loop; fundamental frequency; harmonic components; microprocessor controllers; moving average filter; single-phase source synchronization; smart grids; utility grid; Digital phase-locked-loop; digital system modeling; phase detection;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
PowerTech (POWERTECH), 2013 IEEE Grenoble
Conference_Location :
Grenoble
Type :
conf
DOI :
10.1109/PTC.2013.6652406
Filename :
6652406
Link To Document :
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