Novel SPICE macro modeling for an integrated Si Schottky barrier diode

Author

Ku, Janam ; Min, Younghoon ; Lee, Donghyun ; Song, Iljong ; Shim, Dongsig ; Lee, Namkyoung ; Lee, Seonghearn ; Lee, Yongtaek ; Choi, Munsung ; Kim, Jonghyck

Author_Institution

Samsung Adv. Inst. of Technol., Suwon, South Korea

fYear

2005

fDate

3-4 Oct. 2005

Firstpage

409

Lastpage

412

Abstract

A new and accurate modeling has been performed for an integrated Schottky barrier diode fabricated by 0.18 /spl mu/m standard CMOS process. The bulk and distributed effects are considered by adding macro elements to an original SPICE diode model. The resistance and capacitance model parameters have been obtained precisely by a direct extraction method using S-parameter sets with various bias points. The validity of this new model and parameter extraction method has been verified by comparing with the measured S-parameters over the wide range of bias up to 10 GHz.

Keywords

CMOS integrated circuits; S-parameters; SPICE; Schottky barriers; Schottky diodes; elemental semiconductors; microwave diodes; silicon; CMOS process; S-parameter sets; SPICE diode model; SPICE macromodeling; Si; capacitance model parameters; direct extraction method; distributed effects; integrated Schottky barrier diode fabrication; parameter extraction method; CMOS process; Integrated circuit modeling; Parameter extraction; Parasitic capacitance; Radio frequency; SPICE; Scattering parameters; Schottky barriers; Schottky diodes; Semiconductor device modeling;

fLanguage

English

Publisher

ieee

Conference_Titel

Gallium Arsenide and Other Semiconductor Application Symposium, 2005. EGAAS 2005. European

Conference_Location

Paris

Print_ISBN

88-902012-0-7

Type

conf

Filename

1637242