Thermal characterization of Fan-in Package-on-Packages

The 3D market continues to be driven by mobile applications. The technology integrates devices or packages in the vertical direction to achieve reduction in size and cost along with high performance, challenging IC package designers to maintain a low enough junction temperature without using fans and heat sinks. The study carried out in the paper investigates the effect of design criteria on the thermal performance of a new generation of stacked packages, called Fan-in Package-on-Packages (FiPoPs). The main goal of the undertaken project was to investigate the change in thermal performance in the test model due to variation in the internal thermal design parameters only. Based on the research of earlier generation models, the parameters chosen to analyze in this work included (a) number of thermal vias (b) solder ball I/O density and (c) die size. Due to limited design information pertaining FiPoPs, geometrical and materials parameters for a typical FiPoP were acquired from Statschippac, Inc. This stacked package within FiPoP chosen for analysis included two metal layers, 14 × 14 mm body size, 9 mm × 9 mm die size, 0.075 mm thickness for both top and bottom packages and 0.5 mm solder ball pitch. The results presented by the study show that the thermal resistance of the bottom package of a FiPoP decreases with increase in number of thermal vias and solder balls placed under the package. The decrease in thermal resistance with addition of thermal vias alone is small; solder balls must be added as well to result in significant improvement. As expected, the thermal resistance of the entire package increases as the die size drops.