Rasterization of geometric primitive in graphics based on FPGA

With the demand of real time rendering of large scale of filed scenes, which require the graphic´s processing unit that have the features of high efficiency and low power. the rasterization of graphics is a stage of compute intensive and is a key part to raise the system performance. In this paper, I improve the “CENTROL LINE” rasterization, is the main method for designing VLSI, and focus on the parallel processing, which is geared to hardware implementation. In order to verify the function of this improved algorithm, Matlab is used to simulate the algorithm and was implemented in the FPGA.