DocumentCode
2024851
Title
Low 1/f noise PMOS resistive mixer
Author
Lo, Ivy ; Hong, Yunpyo ; Boric-Lubecke, Olga
Author_Institution
Dept. of Electr. Eng., Univ. of Hawaii at Manoa, Honolulu, HI, USA
fYear
2009
fDate
28-29 Sept. 2009
Firstpage
238
Lastpage
241
Abstract
This paper investigates the advantages of using PMOS devices for passive resistive mixer design. The experimental results presented in this paper demonstrate that PMOS mixers offer the advantage of higher signal to noise ratio at very low output frequencies. The significantly lower 1/f noise more than compensates for the higher conversion loss on PMOS mixer as compared to the NMOS mixer. The PMOS and NMOS resistive ring mixers were fully integrated in 0.25 mum CMOS process. Both mixers exhibit very wide-band performance with RF return loss better than -10 dB from 1 to 7 GHz, and high linearity with IP1dB and IIP3 better than 0 dBm and 10.5 dBm respectively over the entire bandwidth. The measured 1/f noise of the PMOS mixer is 6.3 dB lower than that of the NMOS mixer, resulting in over 3 dB better signal to noise ratio at very low output frequencies. This demonstrated the feasibility of using PMOS mixers for low 1/f noise and high linearity applications. In addition, compared to other published CMOS wide-band resistive mixers, both mixers achieve the best linearity over their entire RF bandwidth.
Keywords
CMOS integrated circuits; UHF mixers; microwave mixers; CMOS process; IIP3; IP1dB; NMOS mixer; NMOS resistive ring mixer; PMOS resistive ring mixer; frequency 1 GHz to 7 GHz; linearity applications; passive resistive mixer design; signal-to-noise ratio; size 0.25 mum; Bandwidth; CMOS process; Frequency measurement; Linearity; MOS devices; Mixers; Performance loss; Radio frequency; Signal to noise ratio; Wideband;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Integrated Circuits Conference, 2009. EuMIC 2009. European
Conference_Location
Rome
Print_ISBN
978-1-4244-4749-7
Type
conf
Filename
5296435
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