• DocumentCode
    2024990
  • Title

    A Fast Input Vector Control approach for Sub-threshold leakage power reduction

  • Author

    Rjoub, Abdoul ; Alajlouni, Almotasem Bellah ; Almanasrah, Hassan

  • Author_Institution
    Comput. Eng. Dept., Jordan Univ. of Sci. & Technol., Irbid, Jordan
  • fYear
    2012
  • fDate
    25-28 March 2012
  • Firstpage
    84
  • Lastpage
    87
  • Abstract
    Due to the significance of leakage power for CMOS circuits at Nanoscale, a new technique for Sub-threshold leakage current reduction based on Input vector control (IVC) is proposed. The proposed algorithm is called Fast Input Vector Algorithm (FIVA). It is characterized as faster than other algorithms, its speed doubles strongly of other algorithms speed when the number of circuit inputs increases. Simulation results show that the efficiency of the proposed algorithm increases by increasing the number of input vector. For 2-bits Full Adder, FIVA has speed up reaches 70%. For 8-bits Full Adder, FIVA has speed up reaches 97%, which validates the proposed algorithm.
  • Keywords
    CMOS logic circuits; adders; CMOS circuits; FIVA; IVC; fast input vector control approach; full adder; subthreshold leakage power reduction; word length 2 bit; Algorithm design and analysis; CMOS integrated circuits; Integrated circuit modeling; Leakage current; Logic gates; Transistors; Vectors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrotechnical Conference (MELECON), 2012 16th IEEE Mediterranean
  • Conference_Location
    Yasmine Hammamet
  • ISSN
    2158-8473
  • Print_ISBN
    978-1-4673-0782-6
  • Type

    conf

  • DOI
    10.1109/MELCON.2012.6196386
  • Filename
    6196386