Title :
HDMI interface based vidio post process platform design
Author :
Wu, Lei ; Yang, Eryan. ; Cheng, Ronghui ; Zhao, Jingjing
Author_Institution :
Sch. of Commun. & Inf. Eng., Shanghai Univ., Shanghai, China
Abstract :
In this paper, based on the Xilinx XUP V5-LX110T board, a video post processing platform with a professional HDMI interface circuitry is designed and a novel de-interlacing algorithm is designed, which performs better than the industry leading algorithms as experimental results show. This platform is to verify our HD video post processing SOC chip which is under development.
Keywords :
field programmable gate arrays; system-on-chip; video signal processing; HD video post processing; HDMI interface; Xilinx XUP V5-LX110T board; system-on-chip; video de-interlacing algorithm; video post process platform design; Algorithm design and analysis; Equations; Field programmable gate arrays; Image edge detection; Interpolation; Mathematical model; Pixel;
Conference_Titel :
Audio Language and Image Processing (ICALIP), 2010 International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-5856-1
DOI :
10.1109/ICALIP.2010.5685172
