DocumentCode :
2025252
Title :
Two-stage adaptive power amplifier MMIC for handset applications
Author :
Noh, Y.S. ; Yom, I.B. ; Park, C.S.
Author_Institution :
Satellite Commun. RF Technol. Team, Electronics & Telecommun. Res. Inst., Daejeon, South Korea
fYear :
2005
fDate :
3-4 Oct. 2005
Firstpage :
493
Lastpage :
496
Abstract :
A high-linearity and high-efficiency MMIC power amplifier is demonstrated adopting a new on-chip adaptive bias circuit, which improves efficiency at the low output power level and linearity at the high output power level automatically. The intelligent two-stage W-CDMA power amplifier using the newly proposed adaptive bias circuit extends the maximum linear output power of 0.6 dB and exhibits an improvement of average power usage efficiency by 1.85 times with a quiescent current of 36 mA.
Keywords :
MMIC power amplifiers; code division multiple access; mobile handsets; wideband amplifiers; 0.6 dB; 36 mA; handset applications; high-efficiency MMIC power amplifier; intelligent two-stage adaptive W-CDMA power amplifier; onchip adaptive bias circuit; power level; power usage efficiency; Adaptive control; Circuits; High power amplifiers; Linearity; MMICs; Multiaccess communication; Power amplifiers; Power generation; Programmable control; Telephone sets;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Gallium Arsenide and Other Semiconductor Application Symposium, 2005. EGAAS 2005. European
Conference_Location :
Paris
Print_ISBN :
88-902012-0-7
Type :
conf
Filename :
1637263
Link To Document :
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