DocumentCode :
2025362
Title :
High-spatial-frequency MOS transistor gate length variations in SRAM circuits
Author :
Ouyang, X. ; Deeter, T. ; Berglund, C.N. ; Pease, R.F.W. ; McCord, M.A.
Author_Institution :
Center for Integrated Syst., Stanford Univ., CA, USA
fYear :
2000
fDate :
2000
Firstpage :
25
Lastpage :
31
Abstract :
SRAM circuits have been used as electrical test structures to study short range spatial variations of MOS transistor effective gate length. Layout-dependent periodic errors were found to take up 30% to 90% of the total observed error variance, depending on the spatial frequency range and specific measurement grid used. Peaks in the measured gate-length error spatial spectrum were related to the periodicities existing in the circuit layout, and lithography simulations were done to identify the error sources. It was found that proximity effects, overlay errors due to stepper lens aberration, and pattern dependent coma effects contributed to a large percentage of the high spatial frequency errors observed.
Keywords :
MOSFET; SRAM chips; semiconductor device measurement; CD metrology; MOS transistor gate length; SRAM circuit; circuit layout; electrical test structure; lithography simulation; overlay error; pattern dependent coma; proximity effect; spatial frequency error; stepper lens aberration; Circuit simulation; Discrete Fourier transforms; Electric resistance; Filters; Fourier transforms; MOS devices; MOSFETs; Random access memory; SRAM chips; Sampling methods;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures, 2000. ICMTS 2000. Proceedings of the 2000 International Conference on
Print_ISBN :
0-7803-6275-7
Type :
conf
DOI :
10.1109/ICMTS.2000.844400
Filename :
844400
Link To Document :
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