DocumentCode :
2025438
Title :
How sensitive is processor customization to the workload´s input datasets?
Author :
Breughe, Maximilien ; Li, Zheng ; Chen, Yang ; Eyerman, Stijn ; Temam, Olivier ; Wu, Chengyong ; Eeckhout, Lieven
Author_Institution :
Ghent Univ., Ghent, Belgium
fYear :
2011
fDate :
5-6 June 2011
Firstpage :
1
Lastpage :
7
Abstract :
Hardware customization is an effective approach for meeting application performance requirements while achieving high levels of energy efficiency. Application-specific processors achieve high performance at low energy by tailoring their designs towards a specific workload, i.e., an application or application domain of interest. A fundamental question that has remained unanswered so far though is to what extent processor customization is sensitive to the training workload´s input datasets. Current practice is to consider a single or only a few input datasets per workload during the processor design cycle - the reason being that simulation is prohibitively time-consuming which excludes considering a large number of datasets. This paper addresses this fundamental question, for the first time. In order to perform the large number of runs required to address this question in a reasonable amount of time, we first propose a mechanistic analytical model, built from first principles, that is accurate within 3.6% on average across a broad design space. The analytical model is at least 4 orders of magnitude faster than detailed cycle-accurate simulation for design space exploration. Using the model, we are able to study the sensitivity of a workload´s input dataset on the optimum customized processor architecture. Considering MiBench benchmarks and 1000 datasets per benchmark, we conclude that processor customization is largely dataset-insensitive. This has an important implication in practice: a single or only a few datasets are sufficient for determining the optimum processor architecture when designing application-specific processors.
Keywords :
application specific integrated circuits; computer architecture; energy conservation; instruction sets; logic design; low-power electronics; multiprocessing systems; power aware computing; application-specific processors; cycle-accurate simulation; datasets; energy efficiency; hardware customization; mechanistic analytical model; processor architecture; processor customization; Analytical models; Benchmark testing; Computer architecture; Hazards; Pipelines; Predictive models; Space exploration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application Specific Processors (SASP), 2011 IEEE 9th Symposium on
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4577-1212-8
Type :
conf
DOI :
10.1109/SASP.2011.5941070
Filename :
5941070
Link To Document :
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