DocumentCode :
2025466
Title :
Customized MPSoC synthesis for task sequence
Author :
Chen, Liang ; Boichat, Nicolas ; Mitra, Tulika
Author_Institution :
Dept. of Comput. Sci., Nat. Univ. of Singapore, Singapore, Singapore
fYear :
2011
fDate :
5-6 June 2011
Firstpage :
16
Lastpage :
21
Abstract :
Multiprocessor System-on-Chip (MPSoC) platforms have become increasingly popular for high-performance embedded applications. Each processing element (PE) on such platforms can be tuned to match the computational demands of the tasks executing on it, creating a heterogeneous multiprocessor system. Extensible processor cores, where the base instruction-set architecture can be augmented with application-specific custom instructions, have recently emerged as flexible building blocks for heterogeneous MPSoC platforms. However, the customization of the different PEs has to be carried out in a synergistic manner so as to create an optimal system. In this work, we propose a pseudo-polynomial time algorithm to design the most resource-efficient customized MPSoC platform for mapping linear task graphs representing streaming applications, under deadline constraints. Experimental validation with MP3 encoder and MPEG-2 encoder applications confirms the efficiency of our approach.
Keywords :
multiprocessing systems; polynomials; system-on-chip; application-specific custom instruction; customized MPSoC synthesis; heterogeneous multiprocessor system; instruction-set architecture; linear task graph; multiprocessor system-on-chip; optimal system; pseudo-polynomial time algorithm; task sequence; Algorithm design and analysis; Computer architecture; Digital audio players; Heuristic algorithms; Software; Throughput; Transform coding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application Specific Processors (SASP), 2011 IEEE 9th Symposium on
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4577-1212-8
Type :
conf
DOI :
10.1109/SASP.2011.5941072
Filename :
5941072
Link To Document :
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