Title :
A 23-24 GHz low power frequency synthesizer in 0.25 /spl mu/m SiGe
Author :
Mazouffre, Olivier ; Lapuyade, Hervé ; Begueret, Jean-Baptiste ; Cathelin, Andreia ; Belot, Didier ; Hellmuth, Patrick ; Deval, Yann
Author_Institution :
IXL Lab., Bordeaux Univ., Toulouse, France
Abstract :
This paper presents the design and the experimental measurements of a 24 GHz fully integrated fractional PLL, for ISM band, with a new low power prescaler. This circuit is implemented in a 0.25 /spl mu/m SiGe:C process from STMicroelectronics (BiCMOS7RF). The PLL power dissipation is 170 mW and fulfills a 23.7 to 24.9 GHz frequency locking range, while exhibiting a phase noise of -100 dBc/Hz at 100 KHz from the carrier. The simulated PLL unity-gain bandwidth is 36 MHz, with a phase margin of 54 /spl deg/. The PLL uses a new latch-based prescaler (SRO) which exhibits a power dissipation of 0.68 GHz/mW.
Keywords :
BiCMOS integrated circuits; Ge-Si alloys; frequency synthesizers; millimetre wave integrated circuits; phase locked loops; phase noise; prescalers; semiconductor materials; 100 kHz; 170 mW; 23.7 to 24.9 GHz; PLL power dissipation; STMicroelectronics; SiGe; integrated fractional PLL; latch-based prescaler; low power frequency synthesizer; Bandwidth; Circuit simulation; Frequency synthesizers; Germanium silicon alloys; Integrated circuit measurements; Phase locked loops; Phase noise; Power dissipation; Power measurement; Silicon germanium;
Conference_Titel :
Gallium Arsenide and Other Semiconductor Application Symposium, 2005. EGAAS 2005. European
Conference_Location :
Paris
Print_ISBN :
88-902012-0-7
