DocumentCode
2025632
Title
Dynamically reconfigurable architecture for a driver assistant system
Author
Harb, Naim ; Niar, Smail ; Saghir, Mazen A R ; Hillali, Y.E. ; Atitallah, R.B.
Author_Institution
Univ. of Valenciennes, Valenciennes, France
fYear
2011
fDate
5-6 June 2011
Firstpage
62
Lastpage
65
Abstract
Application-specific programmable processors are increasingly being replaced by FPGAs, which offer high levels of logic density, rich sets of embedded hardware blocks, and a high degree of customizability and reconfigurability. New FPGA features such as Dynamic Partial Reconfiguration (DPR) can be leveraged to reduce resource utilization and power consumption while still providing high levels of performance. In this paper, we describe our implementation of a dynamically reconfigurable multiple-target tracking (MTT) module for an automotive driver assistance system. Our module implements a dynamically reconfigurable filtering block that changes with changing driving conditions.
Keywords
application specific integrated circuits; driver information systems; field programmable gate arrays; power consumption; reconfigurable architectures; target tracking; FPGA; application specific programmable processor; driver assistant system; dynamic partial reconfiguration; dynamically reconfigurable filtering block; dynamically reconflgurable multiple target tracking module; embedded hardware block; logic density; power consumption; resource utilization; Driver circuits; Estimation; Hardware; Kalman filters; Radar tracking; Target tracking;
fLanguage
English
Publisher
ieee
Conference_Titel
Application Specific Processors (SASP), 2011 IEEE 9th Symposium on
Conference_Location
San Diego, CA
Print_ISBN
978-1-4577-1212-8
Type
conf
DOI
10.1109/SASP.2011.5941079
Filename
5941079
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