Title :
Electromigration test structure designed to identify via failure modes
Author_Institution :
Compaq Comput. Corp., Shrewsbury, MA, USA
Abstract :
A new type of electromigration test structure has been demonstrated, which allows detailed understanding of the electromigration behavior of inter-level vias. It is designed to test each via interface independently. It also allows easy failure analysis by constraining the failure location. An example of its application is provided, where a change in the via process led to improved electromigration behavior. The use of this test structure allowed the identification of physical mechanisms for the improved electromigration behavior.
Keywords :
electromigration; failure analysis; integrated circuit interconnections; integrated circuit reliability; integrated circuit testing; life testing; accelerated testing; constant current electromigration test; electromigration test structure; failure location; inter-level vias; via failure modes; void location; voltage drop; Acceleration; Electromigration; Failure analysis; Life estimation; Life testing; Morphology; Reservoirs; Stress; Voltage; Voltmeters;
Conference_Titel :
Microelectronic Test Structures, 2000. ICMTS 2000. Proceedings of the 2000 International Conference on
Print_ISBN :
0-7803-6275-7
DOI :
10.1109/ICMTS.2000.844423