Title :
On-line error detection in multiplexor based FPGAs
Author_Institution :
Sch. of Comput. Sci., Windsor Univ., Ont., Canada
Abstract :
In this paper we introduce a new method for incorporating on-line error detection capabilities in multiplexor based FPGAs. The advantages, with respect to traditional off-line testing are that there is no need to determine test vectors and no need for storage of the test vectors and correct output responses. We have shown that all single faults in the circuit are detectable using our method. Furthermore, faults in the implementation of the functionality of the circuit can be distinguished from faults in the test circuitry. We have also discussed the detection of multiple faults under two fault models-multiple fault single module (MFSM) and single fault multiple module (SFMM) and analyzed the conditions under which faults can be detected using these models
Keywords :
error detection; fault diagnosis; field programmable gate arrays; integrated circuit testing; logic testing; fault models; multiple fault single module model; multiple faults; multiplexor based FPGAs; online error detection; single fault multiple module model; single faults; Circuit faults; Circuit testing; Computer architecture; Computer errors; Computer science; Electrical fault detection; Fault detection; Field programmable gate arrays; Logic arrays; Logic testing;
Conference_Titel :
VLSI, 2000. Proceedings. IEEE Computer Society Workshop on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7695-0534-1
DOI :
10.1109/IWV.2000.844545
