DocumentCode
2027283
Title
A complete MP3 decoder on a chip
Author
Hedberg, Hugo ; Lenart, Thomas ; Svensson, Henrik
Author_Institution
Dept. of Electroscience, Lund Univ., Sweden
fYear
2005
fDate
12-14 June 2005
Firstpage
103
Lastpage
104
Abstract
The paper presents the results from a course project which focused on all levels in ASIC design flow by implementing a complete MP3 decoder. Two student teams developed a decoder targeting ASIC and FPGA, respectively. The ASIC decoder, fabricated in a 0.35 μm process from AMI Semiconductor, consumes 40 mW with a supply voltage of 2 V running at 12 MHz. The FPGA decoder has been implemented and verified on a Virtex-II platform.
Keywords
application specific integrated circuits; decoding; electronic engineering education; field programmable gate arrays; integrated circuit design; logic design; power consumption; 0.35 micron; 12 MHz; 2 V; 40 mW; ASIC design flow; FPGA decoder; MP3 decoder; course project; Application specific integrated circuits; Communication system control; Decoding; Digital audio players; Energy consumption; Field programmable gate arrays; Filter bank; Frequency synchronization; Hardware; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Systems Education, 2005. (MSE '05). Proceedings. 2005 IEEE International Conference on
Print_ISBN
0-7695-2374-9
Type
conf
DOI
10.1109/MSE.2005.6
Filename
1509384
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