Title :
234 scheduling of 3-2 and 2-1 eliminations for parallel image compositing using non-power-of-two number of processes
Author :
Nonaka, Jorji ; Ono, Kenji ; Fujita, Masahiro
Author_Institution :
Adv. Visualization Res. Team, RIKEN Adv. Inst. of Comput. Sci., Kobe, Japan
Abstract :
Binary-Swap is a parallel image compositing algorithm based on recursive vector halving and distance doubling, and works efficiently when the number of processes is exactly a power-of-two (2n). Several power-of-two converting approaches for Binary-Swap have been proposed. Among them, the Telescope method, based on the Binary Blocks algorithm, has been shown as the most promising approach. The Telescope method decomposes an entire set of processes into blocks of power-of-two size and merges the smaller blocks into larger blocks in stepwise fashion. This block merging process corresponds to the communication and computational overhead of the conversion, and since it can only merge one block per stage, it becomes inefficient as the number of binary blocks increases. In this paper, we focus on a single-stage conversion method using the 3-2 and 2-1 elimination approaches. The original scheduling method, proposed by Rabenseifner et al., is limited to an odd number of processes since it always schedules a single 3-2 elimination per conversion. Taking into consideration that the 3-2 elimination can be optimized on modern HPC systems, which can overlap the communication and computation, we propose 234 Scheduling for scheduling multiple 3-2 eliminations per conversion. The multiple 3-2 elimination scheduling enlarges the application range by enabling its use on an even number of processes. We evaluated 234 Scheduling applied to Binary-Swap on the K computer, which is a modern parallel HPC system, and confirmed its effectiveness.
Keywords :
image processing; parallel processing; processor scheduling; 2-1 elimination approach; 234-scheduling method; 3-2 elimination approach; binary block algorithm; binary blocks; binary-swap; block merging process; communication overhead; computational overhead; distance doubling; non-power-of-two number process; parallel HPC system; parallel image compositing algorithm; power-of-two merging; power-of-two size; recursive vector halving; single-stage conversion method; telescope method; Binary-Swap; K computer; Parallel image compositing; parallel rendering; scientific visualization;
Conference_Titel :
High Performance Computing & Simulation (HPCS), 2015 International Conference on
Conference_Location :
Amsterdam
Print_ISBN :
978-1-4673-7812-3
DOI :
10.1109/HPCSim.2015.7237071