A novel design and simulation of 16 bits RAM implementation in quantum-dot cellular automata (QCA)

This paper proposes and simulation a novel 16 bits Random-Access Memory (RAM) architecture for QCA implementation. Quantum-dot cellular automata (QCA) has been widely advocated as a new device architecture for nanotechnology. QCA systems require low power together with the potential for high density and regularity. These features make QCA an attractive technology for manufacturing memories. RAM presented in this paper, that implemented with new memory cell, which has been designed and simulation with the minimum number of cells, also acts as a pipeline.