DocumentCode :
2028040
Title :
Dynamic reconfiguration of IP based systems
Author :
Visarius, Markus ; Meisel, Andre ; Scheithauer, Markus ; Hardt, Wolfram
Author_Institution :
Fac. of Comput. Sci., Chemnitz Univ. of Technol., Germany
fYear :
2005
fDate :
8-10 June 2005
Firstpage :
70
Lastpage :
76
Abstract :
The design of embedded systems is a complex iterative process. To shorten the design cycles, it is useful to utilize suitable intellectual properties (IPs). At some point during the service life of a product, the owner of the product might wish for additional functions in the device, even if the device is still fully functional. This can be realized by the technique of reconfiguration, a capability usually supported by prototyping platforms such as FPGAs. Automation of various portions of the embedded system design process is necessary in order to make effective use of IPs and reconfiguration capabilities. This implies the specification of a new design flow. In this paper we propose such a design flow and describe the mechanisms we developed for automation. We present relevant aspects for composing an optimized system based on IPs and detail the automatic generation of the system implementation on a prototyping platform. Finally, we give an example, which illustrates the applicability of the proposed design flow.
Keywords :
electronic design automation; embedded systems; industrial property; reconfigurable architectures; FPGA; IP based system dynamic reconfiguration; design cycles; embedded system design process automation; intellectual properties; Chemical technology; Costs; Design automation; Embedded system; Hardware; Intellectual property; Manufacturing; Process design; Prototypes; Watches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Rapid System Prototyping, 2005. (RSP 2005). The 16th IEEE International Workshop on
ISSN :
1074-6005
Print_ISBN :
0-7695-2361-7
Type :
conf
DOI :
10.1109/RSP.2005.23
Filename :
1509435
Link To Document :
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