Title :
Optimization of memory allocation for real-time video processing on FPGA
Author :
Thörnberg, Benny ; Olsson, Leif ; O´Nils, Mattias
Author_Institution :
Mid-Sweden Univ., Sundsvall, Sweden
Abstract :
We present an optimization model for the allocation of shift registers to dual ported FPGA memory blocks. Shift registers are used in real-time video processing for the storage of data flow dependencies. The model is formalized into a mixed integer linear program that can be executed using a general solver. Allocation results from realistic video systems verify the correctness of the model. This model serves as a formal specification and setup for the development of an efficient allocation heuristic.
Keywords :
field programmable gate arrays; formal specification; formal verification; integer programming; linear programming; memory architecture; real-time systems; shift registers; storage allocation; storage management; video signal processing; FPGA memory block; data flow dependency; formal specification; memory allocation; mixed integer linear program; real-time video processing; shift registers; Convolution; Field programmable gate arrays; Formal specifications; Histograms; Labeling; Memory architecture; Phased arrays; Real time systems; Shift registers; Spatiotemporal phenomena;
Conference_Titel :
Rapid System Prototyping, 2005. (RSP 2005). The 16th IEEE International Workshop on
Print_ISBN :
0-7695-2361-7
DOI :
10.1109/RSP.2005.35
