DocumentCode :
2028977
Title :
Analog-technique-based neuroprocessing implemented in hardware
Author :
Wojtyna, Ryszard
Author_Institution :
Fac. of Telecommun. & Electr. Eng., Univ. of Technol. & Life Sci., Bydgoszcz, Poland
fYear :
2009
fDate :
24-26 Sept. 2009
Firstpage :
9
Lastpage :
12
Abstract :
In this paper, possibilities and restrictions of analog signal processing in the context of its application to neural networks are presented. Factors influencing the processing effectiveness are outlined. Current-mode as well as voltage mode techniques are considered. Both techniques possess advantages and disadvantages but the number of situations where the current-mode approach is superior over the other is increasing. The superiority concerns mainly lower power consumption and higher processing speed. Both features are essential when implementing the processing within an integrated circuit, i.e. creating an AISIC (Application Specific Integrated Circuit). Several examples of circuits suitable for CMOS implementation of analog processing are presented. Main emphasis is placed on circuits that perform arithmetic operations and play a role of analog memories. Most of the presented circuits are current mode ones. In the second part of the paper, advantages of using the analog processing technique to neural networks are shown. These are the first published results on the subject and have a novel character. One of interesting conclusions resulting from our studies is that unsupervised learning neural networks can be easier to implement in hardware than learning with a teacher (supervised learning), so popular in software implementation of neural networks. Apart from theoretical considerations, also SPICE simulation and measurement results concerning the realized 0.18μm CMOS prototypes are shown.
Keywords :
CMOS analogue integrated circuits; digital arithmetic; neural nets; signal processing; unsupervised learning; AISIC; CMOS prototypes; SPICE simulation; analog processing technique; analog signal processing; analog technique based neuroprocessing; application specific integrated circuit; arithmetic operations; current mode approach; hardware implementation; higher processing speed; power consumption; unsupervised learning neural networks; voltage mode techniques;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing Algorithms, Architectures, Arrangements, and Applications Conference Proceedings (SPA), 2009
Conference_Location :
Poznan
Print_ISBN :
978-1-4577-1477-1
Electronic_ISBN :
978-83-62065-06-6
Type :
conf
Filename :
5941276
Link To Document :
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