DocumentCode :
2029203
Title :
A hardware invocation mechanism for reconfigurable embedded system
Author :
Chiu, Jih-ching ; Yang, Kai-ming ; Yeh, Ta-Li
Author_Institution :
Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
fYear :
2010
fDate :
16-18 Dec. 2010
Firstpage :
664
Lastpage :
669
Abstract :
The methods of hardware and software co-design for the embedded systems with the reconfigurable components are interesting topics to approach low power and high performance goals. However, designers find integrating hardware and software communications interface being a challenge. In this paper, the integration methods for computing in reconfigurable embedded systems are explored. Through integration linker, hardware net-list files, tasks, and initial file will be combined into one execution file, which can execute in the proposed reconfigurable platforms. Tasks and hardware functions are segregated by program segment prefixes, designed to record interaction information of hardware and software resources. When the executor operates on the target embedded environment, the implicit hardwire-function call will be used to invoke hardware functions by hardware management unit bridging in the task codes. Hardware function pipe mechanisms are also proposed to make hardwire chaining. Through these concepts, each hardware functions can directly pass their results to other hardware function to make the hardware function coralline. The integrating methodology has been implemented in the co-design platform, and this work verifies communication effectiveness between hardware and software through video compression applications.
Keywords :
embedded systems; hardware-software codesign; reconfigurable architectures; video coding; hardware function pipe mechanism; hardware invocation mechanism; hardware net-list files; hardware-software co-design; hardware-software communications interface; integration linker; program segment prefix; reconfigurable embedded system; video compression; Acceleration; Data structures; Embedded systems; Field programmable gate arrays; Hardware; Registers; Embedded System; Reconfigurable Hardware; Reconfigurable platforms;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Symposium (ICS), 2010 International
Conference_Location :
Tainan
Print_ISBN :
978-1-4244-7639-8
Type :
conf
DOI :
10.1109/COMPSYM.2010.5685431
Filename :
5685431
Link To Document :
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