Title :
An FPGA Implemented Processor Architecture with Adaptive Resolution
Author :
Torresen, Jim ; Jakobsen, Jonas
Author_Institution :
Dept. of Informatics, Oslo Univ.
Abstract :
Reconfigurable software has been applied for a long time. Reconfigurable technology also provides possibility for reconfiguring hardware but this has not been much exploited so far. In this paper, a flexible processor architecture is proposed that allows for variable resolution in data variables at run-time. Experiments are undertaken for an image processing task where the results show that the approach is beneficial
Keywords :
field programmable gate arrays; image matching; image resolution; microprocessor chips; reconfigurable architectures; FPGA implemented processor architecture; adaptive resolution; image processing; reconfigurable hardware; reconfigurable software; Computer architecture; Cost function; Field programmable gate arrays; Hardware; Image processing; Informatics; Logic devices; Read-write memory; Reconfigurable logic; Runtime;
Conference_Titel :
Adaptive Hardware and Systems, 2006. AHS 2006. First NASA/ESA Conference on
Conference_Location :
Istanbul
Print_ISBN :
0-7695-2614-4
DOI :
10.1109/AHS.2006.23
