DocumentCode
2030451
Title
Review of fault injection mechanisms and consequences on countermeasures design
Author
Dutertre, Jean-Max ; Fournier, Jacques J. A. ; Mirbaha, Amir-Pasha ; Naccache, David ; Rigaud, Jean-Baptiste ; Robisson, B. ; Tria, Assia
Author_Institution
Dept. Syst. et Archit. Securises (SAS), Ecole Nat. Super. des Mines de St.-Etienne (ENSMSE), Gardanne, France
fYear
2011
fDate
6-8 April 2011
Firstpage
1
Lastpage
6
Abstract
The secret keys handled by cryptographic devices can be extracted using fault attacks associated with cryptanalysis techniques. These faults can be induced by different means such as laser exposure, voltage or clock glitches, electromagnetic perturbation, etc. This paper provides a detailed insight into the physics and mechanisms involved in several fault injection processes. The paper also highlights the difficulty to design countermeasures while even hardware duplication, usually considered as secure, has proved to show flaws against low cost fault injection means.
Keywords
cryptography; fault diagnosis; integrated circuit reliability; clock glitches; countermeasure design; cryptanalysis techniques; cryptographic IC; cryptographic devices; electromagnetic perturbation; fault attacks; fault injection mechanisms; laser exposure; Circuit faults; Clocks; Cryptography; Hardware; Laser beams; Semiconductor lasers; Timing; Fault attack; hardware duplication; laser fault injection; timing constraints violation;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 2011 6th International Conference on
Conference_Location
Athens
Print_ISBN
978-1-61284-899-0
Type
conf
DOI
10.1109/DTIS.2011.5941421
Filename
5941421
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