Comparing topological, symbolic and GA-based ATPGs: an experimental approach

Author

Corno, E. ; Prinetto, P. ; Rebaudengo, M. ; Reorda, M. Sonza

Author_Institution

Dipt. di Autom. e Inf., Politecnico di Torino, Italy

fYear

1996

fDate

20-25 Oct 1996

Firstpage

39

Lastpage

47

Abstract

The goal of this paper is-to compare from an experimental point of view the performance of three ATPG tools for synchronous sequential circuits. The three tools are stare-of-the-art implementations of the topological, symbolic, and GA-based approaches, respectively. The environment set up for obtaining a fair comparison is described: the same hardware platform, circuit and fault list description, and detection mechanism are adopted. The obtained results allow the reader to more deeply understand the characteristics and relative advantages/disadvantages of these methods

Keywords

automatic testing; genetic algorithms; integrated logic circuits; logic design; logic testing; performance evaluation; sequential circuits; ATPG tools; comparison; detection mechanism; fault list description; genetic algorithm; symbolic approach; synchronous sequential circuits; topology; Automatic test pattern generation; Circuit faults; Circuit testing; Clocks; Design for testability; Electrical fault detection; Flip-flops; Genetics; Hardware; Sequential circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1996. Proceedings., International

Conference_Location

Washington, DC

ISSN

1089-3539

Print_ISBN

0-7803-3541-4

Type

conf

DOI

10.1109/TEST.1996.556941

Filename

556941