DocumentCode
2031485
Title
Dependence Analysis and Architecture Design for Bit-Level Algorithms
Author
Shang, Weijia ; Wah, Benjamin W.
Author_Institution
University of Southwestern Louisiana
Volume
1
fYear
1993
fDate
16-20 Aug. 1993
Firstpage
30
Lastpage
38
Abstract
In designing application-specific bit-level architectures and in programming existing bit-level processor arrays, it is necessary to expand a word-level algorithm into its bit-level form before dependence analysis can be performed. In this paper, we consider dependence structures of bit-level algorithms as functions of three components dependence structures of word-level algorithms, dependence structures of the arithmetic algorithms implementing word-wise operations, and algorithm expansions. Based on these components, we can derive dependence structures of bit-level algorithms without using time consuming general dependence analysis methods. To illustrate our approach, we derive two dependence structures for bit-level matrix multiplication and apply a method developed earlier [5,6,10] to design two bit-level architectures. One of these architectures is O{p) times faster than the best word-level architecture, where p is the word length. The speedup we found here is true in general because a bit in a bit-level architecture goes to the next processor for processing as soon as it is available.
Keywords
Algorithm design and analysis; Arithmetic; Computer architecture; Concurrent computing; Contracts; Educational programs; Parallel processing; Performance analysis; Process design; Programming profession;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Processing, 1993. ICPP 1993. International Conference on
Conference_Location
Syracuse, NY, USA
ISSN
0190-3918
Print_ISBN
0-8493-8983-6
Type
conf
DOI
10.1109/ICPP.1993.68
Filename
4134110
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