Title :
Ambipolar double-gate FET binary-decision- diagram (Am-BDD) for reconfigurable logic cells
Author :
Jabeur, K. ; Yakymets, N. ; O´Connor, I. ; Le Beux, S.
Author_Institution :
Ecole Centrale de Lyon, Univ. of Lyon, Ecully, France
Abstract :
A novel Ambipolar Binary Decision Diagram (Am-BDD) is proposed in this paper, to adapt this logic synthesis and verification technique to logic built with ambipolar devices. We demonstrate how this method enables us to build DG-CNTFET-based n-input reconfigurable cells based on pass-transistor-logic obtained from Am-BDDs. We also show how specific correlations between configuration signals can lead to a minimization of their total number. Using the Am-BDD technique, we designed a reconfigurable 2-input cell capable of achieving 16 functions and demonstrating a significant reduction in power consumption (6x) with a reduced worst-case time delay when compared to a manually designed reconfigurable 2-input dynamic logic cell DRLC-7T.
Keywords :
binary decision diagrams; carbon nanotubes; field effect transistors; logic circuits; logic design; Am-BDD technique; DG-CNTFET-based n-input reconfigurable cells; ambipolar double-gate FET binary-decision-diagram; logic synthesis; logicv erification technique; pass-transistor-logic; power consumption; reconfigurable 2-input dynamic logic cell DRLC-7T; reconfigurable logic cells; worst-case time delay; Artificial intelligence; Barium; Boolean functions; Correlation; Data structures; MOS devices; Manuals; BDD; CNTFETs; Reconfigurable cells; ambipolar double-gate devices; emerging technologies;
Conference_Titel :
Nanoscale Architectures (NANOARCH), 2011 IEEE/ACM International Symposium on
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4577-0993-7
DOI :
10.1109/NANOARCH.2011.5941499