• DocumentCode
    2032127
  • Title

    NEMTronics: Symbiotic integration of nanoelectronic and nanomechanical devices for energy-efficient adaptive computing

  • Author

    Wang, Xinmu ; Narasimhan, Seetharam ; Paul, Somnath ; Bhunia, Swarup

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Case Western Reserve Univ., Cleveland, OH, USA
  • fYear
    2011
  • fDate
    8-9 June 2011
  • Firstpage
    210
  • Lastpage
    217
  • Abstract
    Heterogeneity, programmability and parallelism are expected to be the key drivers for future nanoelectronics systems. The proposed work builds on these key drivers to achieve an energy-efficient, adaptive, and reliable computing framework. The primary intellectual merit of this effort lies in the heterogeneous integration of two fundamentally different state variables - charge-based electronics and electromechanical. We exploit the complementary capabilities of the two layers - high-performance operation of nanoscale FET and ultralow-power and harsh environment operation of NEMS - to merge the benefit of both. The layers are used in a symbiotic manner where each addresses the limitations of the other. The leakage/programmability issues in FET layer are addressed by exploiting the near-zero leakage and low ON-resistance of NEMS switches. The reliability and drivability issues of NEMS layer are addressed by FETs. The innovative memory based computing architecture exploits the density advantage of nanoscale memory to reduce the programmable interconnect overhead of traditional reconfigurable computing. It enables realizing custom computing functions in a core-based architecture to improve energy efficiency through hardware acceleration. The fundamental questions on the effectiveness of nanomechanical computing and the physics of its interaction with charge-based nanoelectronics are investigated.
  • Keywords
    CMOS memory circuits; energy conservation; low-power electronics; memory architecture; multiprocessor interconnection networks; nanoelectromechanical devices; nanoelectronics; programmable logic devices; reconfigurable architectures; semiconductor device reliability; switches; NEMS layer drivability; NEMS layer reliability; NEMS switch ON-resistance; NEMTronics; charge-based nanoelectronics; core-based architecture; electromechanical variable; energy-efficient adaptive computing; memory based computing architecture; nanoelectronic device; nanomechanical computing; nanomechanical device; nanoscale FET; nanoscale memory; near-zero leakage; programmability; programmable interconnect; reconfigurable computing; symbiotic integration; ultralow-power NEMS; Computer architecture; FETs; Hardware; Logic gates; Nanoelectromechanical systems; Nanoscale devices; Silicon carbide; Energy-efficiency; High Temperature; Hybridization; Nanoelectronic; Nanomechanical; Symbiotic Integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Nanoscale Architectures (NANOARCH), 2011 IEEE/ACM International Symposium on
  • Conference_Location
    San Diego, CA
  • Print_ISBN
    978-1-4577-0993-7
  • Type

    conf

  • DOI
    10.1109/NANOARCH.2011.5941506
  • Filename
    5941506