DocumentCode :
2032642
Title :
HMIN : A New Method for Hierarchical Interconnection of Processors
Author :
Potlapalli, Yashovardhan R. ; Agrawal, Dharma P.
Author_Institution :
North Carolina State University
Volume :
1
fYear :
1993
fDate :
16-20 Aug. 1993
Firstpage :
303
Lastpage :
306
Abstract :
Hierarchical interconnection schemes have been proposed in the literature to take advantage of locality of refernce. This paper presents a dynamic scheme for hierarchical intercon nection called Hierarchical Multistage Interconnection Net work (HMIN). We discuss the various design alternatives and evaluate each of them with respect to average delay and cost. HMINs are compared only with MINs because of a lack of a method of comparing the cost of a static HIN with a dynamic HMIN.
Keywords :
Contracts; Costs; Delay; Joining processes; Multiprocessing systems; Multiprocessor interconnection networks; Parallel processing; Routing; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Processing, 1993. ICPP 1993. International Conference on
Conference_Location :
Syracuse, NY, USA
ISSN :
0190-3918
Print_ISBN :
0-8493-8983-6
Type :
conf
DOI :
10.1109/ICPP.1993.99
Filename :
4134158
Link To Document :
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