DocumentCode
2033039
Title
Methods for Fast Yield Learning in A DRAM Wafer Fab using a Remote Packaging and Test Site.
Author
Trahan, Robert ; Hill, Winford ; Chapman, Richard ; Bicho, Ana ; Gumaer, Nathan ; Gomes, Marco
Author_Institution
Infineon Technol., Richmond, VA
fYear
2006
fDate
22-24 May 2006
Firstpage
180
Lastpage
184
Abstract
In this paper, we describe the issues and solutions for overcoming the distance between a DRAM wafer fab facility and a remote packaging and test site. Fast cycle time of experimental feedback allow for accelerated yield learning and volume ramping
Keywords
DRAM chips; integrated circuit packaging; integrated circuit testing; integrated circuit yield; production facilities; DRAM wafer fab; accelerated yield learning; remote packaging; test site; volume ramping; Benchmark testing; Costs; Feedback; Iron; Packaging; Performance evaluation; Project management; Random access memory; Semiconductor device testing; Test facilities;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Semiconductor Manufacturing Conference, 2006. ASMC 2006. The 17th Annual SEMI/IEEE
Conference_Location
Boston, MA
ISSN
1078-8743
Print_ISBN
1-4244-0254-9
Type
conf
DOI
10.1109/ASMC.2006.1638748
Filename
1638748
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