Fundamental study of fracture strength of silicon dies in flip-chip lidless packages

Advancement in deep-sub-micron technology has given the microelectronic industry the opportunity to squeeze more transistors on a smaller die. As a result, thermal management solutions for these high-density circuits that dissipate a large amount of heat become ever-more essential. Compounding the thermal management challenge is the high demand for razor-thin products that are driving lidless packaging solutions. These lidless packages expose the die back-side to harsh environments, making it prone to scratches and chippage during assembly, testing, transportation, and handling. Hence, there is an urgent need to evaluate the strength of silicon die in lidless flip-chip packages and understand the effect of die back-side flaws at a fundamental level to ensure that the mechanical reliability of the flip-chip die is uncompromised. This work investigates the influence of microscopic flaws on the fracture strength of silicon die. This paper uses standard techniques to evaluate the strength of flip-chip die as a function of flaw size using a standard flexure test to determine fracture strength and the minimum flaw size required for fracture to occur in a silicon die. Efforts have been made to understand the origin and propagation of cracking in silicon by implementing fracture analysis techniques that can be adopted as one important step in physical failure analysis of die cracks.