DocumentCode :
2033949
Title :
Development of a through-stack-via integrated SRAM module
Author :
Yunhui Zhu ; Xin Sun ; Shenglin Ma ; Qinghu Cui ; Xiao Zhong ; Yuan Bian ; Meng Chen ; Yongqiang Xiao ; Runiu Fang ; Zhenhua Liu ; Zhiyuan Zhu ; Xin Gong ; Jing Chen ; Min Miao ; Wengao Lu ; Yufeng Jin
Author_Institution :
Nat. Key Lab. of Sci. & Technol. on Micro/Nano Fabrication, Peking Univ., Beijing, China
fYear :
2012
fDate :
5-7 Dec. 2012
Firstpage :
346
Lastpage :
350
Abstract :
In this paper, a through-stack-via integration process for SRAM module was developed using wafer level pre-patterned BCB bonding. A SRAM module with a built-in decoder has been designed according to this integration process. TSVs passed through all stacked SRAM chips and common signals, including address bus, data bus, power, write and read control, were connected to the same TSV using RDL. The chip select signals are individually connected to the built-in decoder. RDL was fabricated using lift-off process prior to wafer bonding and via filling. Double-layer spin coating technology was employed to prevent photoresist residues left in TSVs. With pre-patterned BCB adhesive bonding, a bottom-up TSV filling features as the last step, which eliminates the traditional solder bumping, flip chip bonding and underfill filling processes. Preliminary results have shown that this process is promising for integration of memory chips with similar layout.
Keywords :
SRAM chips; adhesive bonding; flip-chip devices; photoresists; solders; spin coating; three-dimensional integrated circuits; wafer bonding; RDL; address bus; bottom-up TSV filling; built-in decoder; data bus; double-layer spin coating technology; flip chip bonding; lift-off process; memory chip; photoresist residue; power control; prepatterned BCB adhesive bonding; read control; solder bumping; stacked SRAM chip; through-stack-via integrated SRAM module; through-stack-via integration process; underfill filling process; wafer level prepatterned BCB bonding; write control; Bonding; Copper; Filling; SRAM chips; Through-silicon vias;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference (EPTC), 2012 IEEE 14th
Conference_Location :
Singapore
Print_ISBN :
978-1-4673-4553-8
Electronic_ISBN :
978-1-4673-4551-4
Type :
conf
DOI :
10.1109/EPTC.2012.6507105
Filename :
6507105
Link To Document :
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