Title :
Increasing Instruct ion-level Parallelism through Multi-way Branching
Author_Institution :
IBM Thomas J. Watson Research Center, NY
Abstract :
Sequential execution of conditional branches in non-numerical code limits the exploitation of instruction-level parallelism (ILP). In order to cope with this limiation, exploitation of parallelism must be extended to concurrent execution of data and branches in a single cycle.
Keywords :
Concurrent computing; Counting circuits; Dynamic scheduling; Frequency; Hardware; Moon; Parallel processing; Reduced instruction set computing; Runtime; VLIW;
Conference_Titel :
Parallel Processing, 1993. ICPP 1993. International Conference on
Conference_Location :
Syracuse, NY, USA
Print_ISBN :
0-8493-8983-6
DOI :
10.1109/ICPP.1993.105
