Electrode design optimization of a CMOS fringing-field capacitive sensor

The capacitance of a micro-capacitive-sensor is mainly depends on its electrode structures, electrode arrangement and the dielectric strength of its surrounding. This paper presents a novel electrode design to enhance the fringing-field and to increase the capacitance of a CMOS MEMS capacitive sensor. The design optimization process is assisted by COMSOL, a multi-physics finite-element simulation tool. The design goal is to maximize the fringing-field of capacitive sensor. The capacitor has been built with a VLSI Schmitt trigger, and temperature compensator to probe the capacitance. The experiment results show that proposed capacitor can achieve the capacitance to 75.2 pF.