Title :
Yield Improvement Using a Fast Product Wafer Level Monitoring System
Author :
Hess, Christopher ; Saadat, Irfan ; Inani, Anand ; Lin, Yun ; Matsuhashi, Hideki ; Squicciarini, Michele ; Lindley, Ron ; Akiya, Nobuchika ; Kaste, Edward F.
Author_Institution :
PDF Solutions Inc., San Jose, CA
Abstract :
A Scribe Characterization Vehiclereg (CVreg) test chip has been developed to enable a fast turn around mass production yield monitoring system. The test chip design is being placed within the scribe lines of product chip reticles, efficiently utilizing three-dimensional stacking of test structures. During manufacturing, wafer level testing will be executed using pdFasTestreg to ensure test times below 10 minutes per 300 mm wafer. The measurement data will then be analyzed using pdCVtrade to determine yield predictive data like fail rates and defect densities. Also variability data of layer specific parameters like sheet resistance and contact/via resistance will be extracted. Finally, extensive statistical analysis will be run using dataPOWERtrade to derive correlation to product yield as well as lot equipment history
Keywords :
integrated circuit yield; production management; production testing; statistical analysis; 3D stacking; CV test chip; Scribe Characterization Vehicle; dataPOWER; mass production; pdCV; pdFasTest; product chip reticles; product wafer level monitoring; scribe lines; statistical analysis; test chip design; wafer level testing; yield improvement; yield predictive data; Chip scale packaging; Contact resistance; Density measurement; Electrical resistance measurement; Manufacturing; Mass production; Monitoring; Semiconductor device measurement; Stacking; System testing;
Conference_Titel :
Advanced Semiconductor Manufacturing Conference, 2006. ASMC 2006. The 17th Annual SEMI/IEEE
Conference_Location :
Boston, MA
Print_ISBN :
1-4244-0254-9
DOI :
10.1109/ASMC.2006.1638794
