• DocumentCode
    2034582
  • Title

    Development of numerical modeling approach on substrate warpage prediction

  • Author

    BISWAS, KAMANASHIS ; Shiguo Liu ; Xiaowu Zhang ; Chai, T.C.

  • Author_Institution
    IBIDEN Singapore Pte Ltd., Singapore, Singapore
  • fYear
    2012
  • fDate
    5-7 Dec. 2012
  • Firstpage
    462
  • Lastpage
    466
  • Abstract
    Prediction and reduction of substrate warpage is very important to enhance assembly yield, and to improve reliability in the microelectronic packaging industry. Modeling the copper trace pattern of a packaging substrate is a difficult and time consuming task. Modeling of these patterns are often too complex for FEM to model exactly, so steps are taken to reduce the number of elements and computation time necessary to model trace patterns with FEM. An often used approach is to use micromechanics considerations to find effective material properties for layers of mixed copper and dielectric material. This approach yields isotropic properties for trace pattern layers based on the percentages of copper and dielectric material present in that layer. But that method is not so accurate to use it always. So, a new approach based on copper percentage at each sub region of a metal layer is proposed. It is found that Cu distribution has a major effect on substrate warpage although average Cu percentages for top and bottom Cu layers are same. By proper distribution of Cu areas on a plane, warpage of the package can be modified. Simulation results of substrate warpage obtained using this cell model are much close to the experimental results. This method is less time consuming and requires less computation time than the actual model with details Cu traces.
  • Keywords
    dielectric materials; electronics packaging; integrated circuit reliability; microassembling; micromechanics; FEM; assembly yield; copper trace pattern; dielectric material; isotropic properties; microelectronic packaging industry; micromechanics considerations; packaging substrate; reliability; substrate warpage prediction; Copper; Predictive models; Semiconductor device modeling; Simulation; Substrates; Temperature measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference (EPTC), 2012 IEEE 14th
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4673-4553-8
  • Electronic_ISBN
    978-1-4673-4551-4
  • Type

    conf

  • DOI
    10.1109/EPTC.2012.6507128
  • Filename
    6507128