DocumentCode
2035123
Title
Thermal, electrical, mechanical analysis and validation of new package TLA developed by UTAC
Author
Kian Yeow Gan ; Thammavet, P. ; Daniel, T.L.T. ; Ore, S.H. ; Tamil, J. ; Hunat, C. ; Yongbo Yang ; Suthiwongsunthorn, Nathapong ; Laihog, E. ; Wattanakaroon, W. ; Sirinorakul, S. ; Gu Bin ; Ang Choon Ghee ; Ting Siew Hong
Author_Institution
United Test & Assembly Center Ltd., Singapore, Singapore
fYear
2012
fDate
5-7 Dec. 2012
Firstpage
582
Lastpage
587
Abstract
IC packaging solution with high reliability, low cost, Hi-density I/O and high thermal, electrical and mechanical performance is critical to keep up with the trend of smaller footprint and better performance of IC die. UTAC´s evolutionary leadless package, the TLA™ (Thermal Leadless Array), the next generation in leadframe packaging was subjected to comprehensive thermal, electrical, mechanical analysis according to industrial standards. TLA utilizes the best aspects of UTAC´s developed LPCC™/QFN and TAPP® technology. This new technology achieves up to 75% reduction (compared to QFP package) in board area as well as dramatically reducing total signal and wire lengths. At a lower cost per I/O than traditional wire bonded packages, the TLA has the highest I/O count per body size in a lead frame based package. The TLA is able to replace QFPs, BGAs, large body and dual Row QFNs, QFPs, FPBGAs, MCM and SiP. This paper presents the detailed thermal, electrical and mechanical analysis and experimental results of the UTAC´s TLA. The author states the overview of the analysis methodology in the introduction. It is then followed by detailed explanation of analysis and results in all rounded aspect including thermal, electrical and mechanical. The TLA overall performance is generally better or comparable to the targeted predecessor TLLGA+. It also passed the board level reliability test in accordance to JEDEC standards and the internal qualifications are currently in good progress.
Keywords
ball grid arrays; integrated circuit packaging; integrated circuit reliability; standards; FPBGA; JEDEC standards; LPCC-QFN; TAPP technology; TLA; UTAC evolutionary leadless package; board level reliability; electrical analysis; hi-density I/O; integrated circuit packaging; integrated circuit reliability; lead frame based package; mechanical analysis; targeted predecessor TLLGA; thermal analysis; thermal leadless array; Atmospheric modeling; Electrical resistance measurement; Junctions; Standards; Temperature measurement; Thermal analysis; Thermal resistance;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Packaging Technology Conference (EPTC), 2012 IEEE 14th
Conference_Location
Singapore
Print_ISBN
978-1-4673-4553-8
Electronic_ISBN
978-1-4673-4551-4
Type
conf
DOI
10.1109/EPTC.2012.6507149
Filename
6507149
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