DocumentCode :
2035518
Title :
Using the DEVS paradigm to implement a simulated processor
Author :
Daicz, Sergio ; Tróccoli, Alejandro ; Zlotnik, Sergio ; Wainer, Gabriel
Author_Institution :
Dept. of Comput., Buenos Aires Univ., Argentina
fYear :
2000
fDate :
2000
Firstpage :
58
Lastpage :
65
Abstract :
This work is devoted to present the design and implementation of Alfa-I, a simulated computer with educational purposes. The DEVS formalism was used to attack the complexity of the design, allowing the definition of individual components that can be lately integrated into a modelling hierarchy. The tool is designed for the use in Computer Architecture and Organization courses. Its goal is allowing the students to acquire some practice in the design and implementation of hardware components by using simulation
Keywords :
computer architecture; computer science education; discrete event simulation; educational courses; virtual machines; Alfa-I; DEVS paradigm; computer architecture course; computer science education; hardware simulation; modelling hierarchy; simulated processor; students; Bibliographies; Computational modeling; Computer architecture; Computer simulation; Logic; Microprogramming; Operating systems; Security; Software tools; World Wide Web;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Simulation Symposium, 2000. (SS 2000) Proceedings. 33rd Annual
Conference_Location :
Washington, DC
ISSN :
1080-241X
Print_ISBN :
0-7695-0598-8
Type :
conf
DOI :
10.1109/SIMSYM.2000.844901
Filename :
844901
Link To Document :
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