The effective use of BIST and boundary-scan in multi-chip module testing

Products motivated by performance-driven and/or density-driven goals are utilizing Multi-Chip Module (MCM) technology. However, this technology still has several challenging problems that need to be resolved before it becomes a widely adopted solution. One of the critical problems is meeting the quality requirements of MCM manufacturing, and hence reaching acceptable MCM assembly yields. This can be achieved by adopting a testing strategy, that first guarantees the quality of incoming bare dies and expensive substrates prior to module assembly, then ensures the functionality and performance of the assembled MCMs, and finally helps isolating the defected parts prior to the rework process. This paper presents a testability strategy that can be implemented mainly by incorporating Built-in Self-Test (BIST) and Boundary-Scan during the chip design cycle. And based on which the paper demonstrates the testing and diagnosis procedures needed to meet the above duality target. The proposed testability strategy can be considered universal, since it is independent of silicon, substrate or attachment technologies adopted to build the MCM